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DEPARTMENT OF

Computer Science
and Engineering

भारतीय प्रौद्योगिकी संस्थान इंदौर

Indian Institute of Technology Indore

Patents

Total Patents:20
#1
"Multi-Modal Encoded Transformation Augmented with Key-Driven Ciphered Digest for Securing DSP Hardware"
Anirban Sengupta
Indian Patent Application No. 202621024721, March 2026.
#2
"A Hardware IP Protection against IP Piracy based on IP vendor's Genomic Microsatellites u-sat/Short-Tandem Repeat (STR) for Forensic Hardware Watermark"
Anirban Sengupta
Patent No. 577682, Granted by Indian Patent Office (IPO), Jan 2026.
#3
"Proteogenomic Biomarker based HLS Watermark for Hardware IP Security"
Anirban Sengupta
Patent Application No. 202521019673, 2025, Granted by Indian Patent Office (IPO), Govt. of India.
#4
"A Hardware IP Protection against IP Piracy based on IP vendor's Genomic Microsatellites u-sat/Short-Tandem Repeat (STR) for Forensic Hardware Watermark"
Anirban Sengupta
Patent Application No. 202521019675, 2025, Granted by Indian Patent Office (IPO), Govt. of India.
#5
"A Behavioral Synthesis based Hardware IP Protection using Microscopic Fingerprint Datum Lines and Star-Burst of IP Vendor augmented with Encoded Hash as Embedded Forensic Digital Evidence"
Anirban Sengupta
Patent Application No. 202521019674, 2025, Indian Patent Office (IPO), Govt. of India.
#6
"Secure Hardware of GLRT Cascade using Color Interval Graph based Embedded Fingerprint for ECG Detector"
Anirban Sengupta
Patent No. 557485, 2025, Granted by Indian Patent Office (IPO), Govt. of India.
#7
"A hardware security method to design secure hardware accelerators for cardiac pacemaker"
Anirban Sengupta
Patent No. 202321036317, 2023, Indian Patent Office (IPO), Govt. of India.
#8
"Improved Schedule Delay Estimation Process for Datapath during High Level Synthesis of Application Specific Processors"
Anirban Sengupta
Patent No 458850, Granted by Indian Patent Office (IPO), 2023.
#9
"Design Space Exploration of An Optimized Hardware Trojan Detectable/Secured Datapath During High Level Synthesis"
Anirban Sengupta
Patent No. 430067, 2023, Granted by Indian Patent Office (IPO), Govt. of India.
#10
"Design Space Exploration of Optimal Kc-Cycle Transient Fault Secured Datapath System with Intelligent Cut Insertion"
Anirban Sengupta
Patent No.: 432435, 2023, Granted by Indian Patent Office (IPO), Govt. of India.
#11
"Design Space Exploration of Optimal k-Cycle Transient Fault Tolerant Datapath Based on Multi-Objective Power-Performance Tradeoff"
Anirban Sengupta
Patent No. 392356, 2022, Granted by Indian Patent Office (IPO), Govt. of India.
#12
"Design Space Exploration System and Method Thereof Using a Bacterial Foraging Optimization Mechanism"
Anirban Sengupta
Patent No. 366323, 2021, Granted by Indian Patent Office (IPO), Govt. of India.
#13
"Embedding Watermark based on Multi-Variable Signature Encoding at Behaviour Level for Reusable IP Core Protection"
Anirban Sengupta
Patent 4466/MUM/2015, July 11, 2017.
#14
"Method and System for Automatic Fault Recovery and True Output Extraction during High Level Synthesis"
Anirban Sengupta
Patent No. 2478/MUM/2014, 2015.
#15
"Improved Schedule Delay Estimation Process for Datapath during High Level Synthesis"
Anirban Sengupta
Patent No. 2482/MUM/2014, 2015, (Status: Published).
#16
"Embedding Watermark based on Multi-Variable Signature Encoding at Behaviour Level for Reusable IP Core Protection"
Anirban Sengupta
Indian Patent Office (IPO), 4466/MUM/2015, Nov 27, 2015.
#17
"System And Method For Electrical Energy Conservation"
Dr. Gourinath Banda
Filing Date: 28th of October, 2015, Application No.: 4092/MUM/2015.
#18
"System And Method For Sign Language Gesture Recognition"
Aruna Tiwari, Ashok Pencily Poothiyat, Kunal Chaudhary
1988/MUM/2015, 2015.
#19
"System and Method for Development of System Architecture"
Anirban Sengupta (co-inventor: Reza Sedaghat)
US Patent by United States Patent and Trademark Office (USPTO), Patent no. US 8,826,199 B2, Sep 2014, Granted by USPTO.
#20
"System and methodology for development of a system architecture using optimization parameters"
Anirban Sengupta (co-inventor: Reza Sedaghat)
US Patent by United States Patent and Trademark Office (USPTO), Patent no. US 8,397,204, March 12, 2013, Granted by USPTO.